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Course Description Course Name : Advanced Logic Design Course Code : CENG-503 Course Type : Optional Level of Course : Second Cycle Year of Study : 1 Course Semester : Fall (16 Weeks) ECTS : 6 Name of Lecturer(s) : Asst.Prof.Dr. MUTLU AVCI Learning Outcomes of the Course : Understands basic concepts and design principles of FPGA and VHDL. Comprehends design problems and solutions. Learns data structures and algorithms for FPGA design. Implements FPGA design Mode of Delivery : Face-to-Face Prerequisites and Co-Prerequisites : None Recommended Optional Programme Components : None Aim(s) of Course : To provide comprehensive background in the design of FPGA VHDL, introduce design steps of FPGA and programming environments and implement design applications. Course Contents : FPGA: properties, evolution, application areas, structure, design techniques. VHDL: design methoologies, general rules, definitions, design parts, data structures. Standard design methods. Finite state machines, definitions of states. Simulation types, tools and test benchs. Introducing Quartus II and ISE programs. I/O file packages, delays, FPGA programming and applications. Language of Instruction : English Work Place : Classroom for master students   Course Outline /Schedule (Weekly) Planned Learning Activities Week Subject Student's Preliminary Work Learning Activities and Teaching Methods 1 FPGA properties, structures and evolution Reading corresponding subject of textbooks Lecturing 2 Programmable logic devices and FPGA Reading corresponding subject of textbooks Lecturing 3 FPGA design techniques and design constraints Reading corresponding subject of textbooks Lecturing 4 Properties of VHDL, keywords Reading corresponding subject of textbooks Lecturing 5 General VHDL rules and design parts Reading corresponding subject of textbooks Lecturing 6 Data objects, data types, sub types and operators Reading corresponding subject of textbooks Lecturing and demonstration 7 Parallel and sequential expressions Reading corresponding subject of textbooks Lecturing and demonstration 8 Midterm Exam Examination 9 Finite state machines. Reading corresponding subject of textbooks + Homework 1 Lecturing and demonstration 10 Simulation types, tools and test benchs Reading corresponding subject of textbooks + Homework2 Lecturing and demonstration 11 I/O file packages Reading corresponding subject of textbooks+ Homework3 Lecturing and demonstration 12 Signal delays and general design rules Reading corresponding subject of textbooks Lecturing 13 Introduction to FPGA programming Reading corresponding subject of textbooks+ Homework4 Lecturing and demonstration 14 FPGA applications Reading corresponding subject of textbooks + Homework5 Lecturing and implementation 15 FPGA applications Reading corresponding subject of textbooks + Homework6 Lecturing and implementation 16/17 Problem hour Problem solving   Required Course Resources Resource Type Resource Name Recommended Course Material(s)  Design Recipes for FPGAs: Using Verilog and VHDL Peter R.Wilson, 2007  Every aspect of FPGA and VHDL, Engin Sarıtaş, Sedat Karataş, 2013 Required Course Material(s)   Assessment Methods and Assessment Criteria Semester/Year Assessments Number Contribution Percentage     Mid-term Exams (Written, Oral, etc.) 1 70     Homeworks/Projects/Others 6 30 Total 100 Rate of Semester/Year Assessments to Success 40   Final Assessments 100 Rate of Final Assessments to Success 60 Total 100   Contribution of the Course to Key Learning Outcomes # Key Learning Outcome Contribution* 1 Reaches wide and deep knowledge through scientific research in the field of computer engineering, evaluates, implements, and comments. 4 2 Describes and uses information hidden in limited or missing data in the field of computer engineering by using scientific methods and integrates it with information from various disciplines. 5 3 Follows new and emerging applications of computer engineering profession, if necessary, examines and learns them 4 4 Develops methods and applies innovative approaches in order to formulate and solve problems in computer engineering. 4 5 Proposes new and/or original ideas and methods in the field of computer engineering in developing innovative solutions for designing systems, components or processes. 3 6 Designs and implements analytical modeling and experimental research and solves the complex situations encountered in this process in the field of Computer Engineering 3 7 works in multi disciplinary teams and takes a leading role and responsibility. 4 8 Learns at least one foreign language at the European Language Portfolio B2 level to communicate orally and written 0 9 Presents his/her research findings systematically and clearly in oral and written forms in national and international meetings. 4 10 Describes social and environmental implications of engineering practice. 0 11 Considers social, scientific and ethical values in collection, interpretation and announcement of data. 4 12 Acquires a comprehensive knowledge about methods and tools of computer engineering and their limitations. 5 * Contribution levels are between 0 (not) and 5 (maximum).   Student Workload - ECTS Works Number Time (Hour) Total Workload (Hour) Course Related Works     Class Time (Exam weeks are excluded) 14 3 42     Out of Class Study (Preliminary Work, Practice) 12 2 24 Assesment Related Works     Homeworks, Projects, Others 6 3 18     Mid-term Exams (Written, Oral, etc.) 1 24 24     Final Exam 1 39 39 Total Workload: 147 Total Workload / 25 (h): 5.88 ECTS Credit: 6